Maxim - High-Speed Microcontroller User’s Guide.pdf

Maxim high-speed microcontrollers are 8051-compatible devices that provide improved performance and power consumption compared to the original version. They retain instruction-set and object-code compatibility with the 8051, yet perform the same operations in fewer clock cycles. Consequently, more throughput is possible for the same crystal speed. As an alternative, the high-speed microcontroller’s more efficient design allows a much slower crystal speed to get the same results as an original 8051, using much less power.
The fundamental innovation of the high-speed microcontroller is the use of only four clocks per instruction cycle compared with 12 for the original 8051. This results in up to three times improvement in performance. In addition, the high-speed microcontroller is updated with several new peripherals and features while providing all of the standard features of an 80C32. These include 256 bytes of on-chip RAM for variables and stack, 32 I/O ports, three 16-bit timer/counters, and an on-chip UART.

Table of contents:
  1. INTRODUCTION
  2. ORDERING INFORMATION
  3. ARCHITECTURE [ ALU ~ SPECIAL FUNCTION REGISTERS (SFRS) ~ Accumulator ~ B Register ~ Program Status Word ~ Data Pointer(s) ~ Stack Pointer ~ I/O Ports ~ Timer/Counters ~ UARTs ~ Scratchpad Registers (RAM) ~ Stack ~ Working Registers ~ Program Counter ~ Address/Data Bus ~ Watchdog Timer ~ Power Monitor ~ Interrupts ~ Timing Control ~ Real-Time Clock ~ Feature Summary ]
  4. PROGRAMMING MODEL [ MEMORY ORGANIZATION ~ Memory Map ~ Register Map ~ SPECIAL FUNCTION REGISTERS ~ Port 0 (P0) ~ Stack Pointer (SP) ~ Data Pointer Low 0 (DPL) ~ Data Pointer High 0 (DPH) ~ Data Pointer Low 1 (DPL1) ~ Data Pointer High 1 (DPH1) ~ Data Pointer Select (DPS) ~ Power Control (PCON) ~ Timer/Counter Control (TCON) ~ Timer Mode Control (TMOD) ~ Timer 0 LSB (TL0) ~ Timer 1 LSB (TL1) ~ Timer 0 MSB (TH0) ~ Timer 1 MSB (TH1) ~ Clock Control (CKCON) ~ Port 1 (P1) ~ External Interrupt Flag (EXIF) ~ RTC Trim Register (TRIM) ~ Serial Port 0 Control (SCON0) ~ Serial Data Buffer 0 (SBUF0) ~ Port 2 (P2) ~ Interrupt Enable (IE) ~ Slave Address Register 0 (SADDR0) ~ Slave Address Register 1 (SADDR1) ~ Port 3 (P3) ~ Interrupt Priority (IP) ~ Slave Address Mask Enable Register 0 (SADEN0) ~ Slave Address Mask Enable Register 1 (SADEN1) ~ Serial Port Control (SCON1) ~ Serial Data Buffer 1 (SBUF1) ~ ROM Size Select (ROMSIZE) ~ Power Management Register (PMR) ~ Status Register (STATUS) ~ Timed Access Register (TA) ~ Timer 2 Control (T2CON) ~ Timer 2 Mode (T2MOD) ~ Timer 2 Capture LSB (RCAP2L) ~ Timer 2 Capture MSB (RCAP2H) ~ Timer 2 LSB (TL2) ~ o n l i n e f r e e e b o o k s . n e t ~ Timer 2 MSB (TH2) ~ Program Status Word (PSW) ~ Watchdog Control (WDCON) ~ Accumulator (A or ACC) ~ Extended Interrupt Enable (EIE) ~ B Register (B) ~ Real-Time Alarm Subsecond Register (RTASS) ~ Real-Time Alarm Second Register (RTAS) ~ Real-Time Alarm Minute Register (RTAM) ~ Real-Time Alarm Hour Register (RTAH) ~ Extended Interrupt Priority (EIP) ~ Real-Time Clock Control Register (RTCC) ~ Real-Time Clock Subsecond Register (RTCSS) ~ Real-Time Clock Second Register (RTCS) ~ Real-Time Clock Minute Register (RTCM) ~ Real-Time Clock Hour Register (RTCH) ~ Real-Time Clock Day Register 0 (RTCD0) ~ Real-Time Clock Day Register 1 (RTCD1) ~ INSTRUCTION TIMING ~ ADDRESSING MODES ~ Register Addressing ~ Direct Addressing ~ Register Indirect Addressing ~ Immediate Addressing ~ Register Indirect with Displacement ~ Relative Addressing ~ Page Addressing ~ Extended Addressing ~ PROGRAM STATUS FLAGS ~ www.onlinefreeebooks.net ~ Bit Descriptions ]
  5. CPU TIMING [ OSCILLATOR ~ XTAL1 ~ XTAL2 ~ OSCILLATOR CHARACTERISTICS ~ CRYSTAL SELECTION ~ INSTRUCTION TIMING ~ Single-Cycle Instructions ~ Two-Cycle Instructions ~ Three-Cycle Instructions ~ Four-Cycle Instructions ~ Five-Cycle Instructions ~ COMPARISON TO THE 8051. ]
  6. MEMORY ACCESS [ INTERNAL PROGRAM MEMORY ~ INTERNAL DATA MEMORY ~ ROMSIZE Feature ~ PROGRAM MEMORY INTERCONNECT ~ DATA MEMORY INTERCONNECT ~ DATA MEMORY ACCESS ~ 64-Byte Block Move With Dual Data Pointer ~ 64-Byte Block Move Without Dual Data Pointer ~ DATA MEMORY TIMING ]
  7. POWER MANAGEMENT [ POWER MANAGEMENT FEATURES ~ Early Warning Power-Fail Interrupt ~ Power-Fail Reset ~ Power-On Reset ~ Bandgap Select ~ Watchdog Wake-Up ~ Power Management Summary ~ POWER CONSERVATION ~ Idle Mode ~ Stop Mode ~ Ring Oscillator Wake-Up from Stop ~ POWER MANAGEMENT MODES ~ Power Management Mode Timing ~ PMM and Peripheral Functions ~ Switchback ~ Clock Source Selection ~ Using the Ring Oscillator ~ Switching Between Clock Sources ]
  8. RESET CONDITIONS [ RESET SOURCES ~ Power-On/Fail Reset ~ www.onlinefreeebooks.net ~ Watchdog Timer Reset ~ External Reset ~ RESET STATE ~ NO-BATTERY RESET ~ IN-SYSTEM DISABLE MODE. ]
  9. INTERRUPTS [ INTERRUPT OVERVIEW ~ INTERRUPT SOURCES ~ External Interrupts ~ Timer Interrupts ~ Serial Communication Interrupts ~ Real-Time Clock ~ Power-Fail Interrupt ~ SIMULATED INTERRUPTS ~ INTERRUPT PRIORITIES ~ INTERRUPT ACKNOWLEDGE CYCLE ~ INTERRUPT LATENCY ~ INTERRUPT REGISTER CONFLICTS ]
  10. PARALLEL I/O [ PORT 0 ~ General-Purpose I/O ~ Multiplexed Address/Data Bus AD0-AD7 ~ PORT 2 ~ General-Purpose I/O ~ Most Significant Address Byte, A8-A15 ~ PORTS 1 AND 3 ~ OUTPUT FUNCTIONS ~ CURRENT-LIMITED TRANSITIONS ~ INPUT FUNCTIONS ~ READ-MODIFY-WRITE INSTRUCTIONS ~ INSTRUCTION DESCRIPTION ~ I/O PORT TIMING ~ OPTIONAL FUNCTIONS. ]
  11. PROGRAMMABLE TIMERS [ 16-BIT TIMERS ~ Timer Mode Control Register (TMOD) Summary ~ www.onlinefreeebooks.net ~ Timer/Counter Control Register (TCON) Summary ~ MODE 0 ~ MODE 1 ~ MODE 2 ~ MODE 3 ~ TIMER 2 ~ Timer Two Control Register (T2CON) Summary ~ Timer Two Mode Control Register (T2MOD) Summary ~ Timer 2 Capture Registers (RCAP2L, RCAP2H) Summary ~ TIMER 2 MODES ~ 16-Bit Timer/Counter ~ 16-Bit Timer with Capture ~ 16-Bit Auto-Reload Timer/Counter ~ Up/Down Count Auto-Reload Timer/Counter ~ Baud-Rate Generator ~ Timer Output Clock Generator ~ TIME BASE SELECTION ~ WATCHDOG TIMER ~ Watchdog Control Register (WDCON) Summary ~ Clock Control Register (CKCON) Summary . ]
  12. SERIAL I/O [ SERIAL MODE SUMMARY ~ Mode 0 ~ Mode 1 ~ Mode 2 ~ Mode 3 ~ SERIAL PORT INITIALIZATION ~ Serial Port Control 0 Register (SCON0; 98h) ~ Serial Port Control 1 Register (SCON1; C0h) ~ Power Control Register (PCON; 87h) ~ Watchdog Control Register (WDCON; D8h) ~ Timer Two Control Register ( T2CON; C8h) ~ BAUD RATES ~ Mode 0 ~ Mode 2 ~ Mode 1 or 3 ~ SERIAL I/O DESCRIPTION ~ Mode 0 ~ Mode 1 ~ Mode 2 ~ Mode 3 ~ FRAMING ERROR DETECTION ~ MULTIPROCESSOR COMMUNICATION . ]
  13. TIMED-ACCESS PROTECTION [ PROTECTED BITS ~ PROTECTION SCHEME ~ TIMED-ACCESS PROTECTS WATCHDOG ]
  14. REAL-TIME CLOCK [ STARTING AND STOPPING THE RTC ~ SETTING AND READING THE RTC TIME REGISTERS ~ USING THE RTC ALARM ~ USING THE DAY OF THE WEEK BITS ~ CHOOSING AN RTC CRYSTAL ~ CALIBRATING THE RTC OSCILLATOR . ]
  15. BATTERY BACKUP [ SELECTING A BATTERY ~ LITHIUM BATTERY CONSIDERATIONS ]
  16. INSTRUCTION SET DETAILS
  17. TROUBLESHOOTING. [ DEVICE OPERATES AT ONE-THIRD THE CRYSTAL SPEED ~ DEVICE RESETS FOR NO REASON ~ ACCESS TO INTERNAL MOVX SRAM IS UNSUCCESSFUL ~ REAL-TIME CLOCK DOES NOT OPERATE OR KEEP ACCURATE TIME ~ SERIAL PORT DOES NOT WORK ~ HIGH-SPEED MICROCONTROLLER DOES NOT WORK IN EXISTING 8051 DESIGN ]
  18. MICROCONTROLLER DEVELOPMENT SUPPORT [ TECHNICAL SUPPORT ~ DEVELOPMENT TOOLS ~ SOFTWARE COMPATIBILITY ~ HIGH-LEVEL LANGUAGE COMPILERS ]
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